Computer Organization/Architecture Questions

Description:
Need questions 1 and 2 that are listed below after the description. The problems require the table which I have attached.

Towards the end of the chapter (p. 160-161), examples of deriving
control signals are given. Table 5-6 lists out the "actions" to
fetch/decode/execute each CPU instruction.

List out the control signals given when a CPU instruction is
being executed. For example, when each of the instructions X,
Y, and Z is being executed, the control unit gives a set of
signals at different time T:
X: at T4, signals A0 A1 C0
at T5, signals A1 B0

Y: at T3, signals B1 C0
at T4, signals A1 B1 C1

Z: at T4: signals A0 C1
at T5, signals A1 B0 C0

Then, each signal is given when:
A0 = X T4 + Z T4 = (X+Z) T4
A1 = X T4 + X T5 + Y T4 + Z T5 = (X+Y) T4 + (X+Z) T5
B0 = X T5 + Z T5 = (X+Z) T5
B1 = Y T3 + Y T4 = Y (T3+T4)
C0 = X T4 + Y T3 + Z T5
C1 = Y T4 + Z T4 (Y+Z) T4

1. For the Fetch, Decode, and Indirect steps (T0 through T3)
list out signals like the above. First list out signals
used in Fetch, Decode, then Indirect. Then for each signal,
list its timing definition.
Order the listing alphabetically.
(There should be 8 different signals appeared 12 times.)
(3 pts)

2. For signals used to execute 7 different memory-reference
instructions, sort them out the same way as above. First
by instruction name, then by signal name.
Order the listing alphabetically. (7 pts)